# US 10,120,585 B2 · Memory system of optimal read reference voltage and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,120,585 B2 - Document ID: US10120585B2 - Status: Granted - Kind: B2 - Application number: 15/663,470 - Filed: 2017-07-28 - Published: 2018-02-15 - Granted: 2018-11-06 - Earliest claimed: 2016-08-10 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Chenrong Xiong; Fan Zhang; Yu Cai; HyungSeok Kim; June Lee; David Pignatelli - Web page: https://patentgrep.com/patent/US10120585B2 ## CPC - G06F 3/061: {Improving I/O performance} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 16/10: Programming or data input circuits - G11C 16/28: using differential sensing or reference cells, e.g. dummy cells - G11C 29/021: {in voltage or current generators} - G11C 29/026: {in sense amplifiers} - G11C 29/028: {with adaption or trimming of parameters} - G11C 29/42: using error correcting codes [ECC] or parity check - G11C 11/5642: {Sensing or reading circuits; Data output circuits} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled with the plurality of memory devices, configured to determine a range of read reference voltages having a plurality of read reference voltages, the read reference voltages achieving a minimal rBER; calculate an optimal read reference voltage in accordance with at least the range of read reference voltages; achieve a rBER in accordance with at least the optimal read reference voltage; and execute error correction process with at least the optimal read reference voltage. ## Claims ### Claim 1 An operating method of a memory system including a memory device, the operating method comprising: determining, using a processor of the memory system, a range for obtaining an optimal read reference voltage for reading data from a memory cell in the memory device based on a voltage distribution of the memory cell, the range being defined by a lower most voltage and an upper most voltage; calculating, using the processor, the optimal read reference voltage within the range based on the lower most voltage and the upper most voltage; and executing an error correction process, using an error correction code component and achieving an rBER in accordance with the optimal read reference voltage. ### Claim 2 (depends on 1) The method of claim 1, wherein the range is determined such that each voltage in the range, when used as a read reference voltage, is able to achieve a minimal rBER in the error correction process. ### Claim 3 (depends on 1) The method of claim 1, wherein the calculating the optimal read reference voltages includes calculating a middle point of the upper most voltage and the lower most voltage. ### Claim 4 (depends on 1) The method of claim 1, wherein the executing the error correction process includes achieving the minimal rBER in accordance with the optimal read reference voltage. ### Claim 5 (depends on 1) The method of claim 1, wherein the executing the error correction process includes generating soft information in accordance with the optimal read reference voltage. ### Claim 6 (depends on 1) The method of claim 1, wherein the executing the error correction process includes generating hard information in accordance with the optimal read reference voltage. ### Claim 7 An apparatus of a memory system comprising: a memory devices; and a controller, coupled with the memory devices, configured to: determine a range for obtaining an optimal read reference voltage for reading data from a memory cell in the memory device based on a voltage distribution of the memory cell, the range being defined by a lower most voltage and an upper most voltage; calculate the optimal read reference voltage within the range based on the lower most voltage and the upper most voltage; and execute an error correction process, achieving an rBER in accordance with the optimal read reference voltage. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the range is determined such that each voltage in the range, when used as a read reference voltage, is able to achieve a minimal rBER in the error correction process. ### Claim 9 (depends on 7) The apparatus of claim 7, wherein the controller is further configured to calculate a middle point of the upper most voltage and lower most voltage. ### Claim 10 (depends on 7) The apparatus of claim 7, wherein the controller is further configured to execute the error correction process, achieving the minimal rBER in accordance with the optimal read reference voltage. ### Claim 11 (depends on 7) The apparatus of claim 7, wherein the controller is further configured to generate soft information in accordance with the optimal read reference voltage in executing the error correction process. ### Claim 12 (depends on 7) The apparatus of claim 7, wherein the controller is further configured to generate hard information in accordance with the optimal read reference voltage in executing the error correction process. ### Claim 13 A memory system, comprising: a processor; a tangible computer readable storage medium coupled to the processor, embedding a non-transitory computer program product for execution by the processor, including computer instructions configured to: determine a range for obtaining an optimal read reference voltage for reading data from a memory cell in the memory device based on a voltage distribution of the memory cell, the range being defined by a lower most voltage and an upper most voltage; calculate the optimal read reference voltage within the range based on the lower most voltage and the upper most voltage; and execute an error correction process, achieving an rBER in accordance with the optimal read reference voltage.