# US 10,120,029 B2 · Low power testing based on dynamic grouping of scan > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,120,029 B2 - Document ID: US10120029B2 - Status: Granted - Kind: B2 - Application number: 14/710,390 - Filed: 2015-05-12 - Published: 2015-11-12 - Granted: 2018-11-06 - Earliest claimed: 2014-05-12 - Assignees: Mentor Graphics Corporation - Applicants: Mentor Graphics Corporation - Inventors: Janusz Rajski; Sylwester Milewski; Grzegorz Mrugalski; Jerzy Tyszer - Web page: https://patentgrep.com/patent/US10120029B2 ## CPC - G01R 31/318575: {Power distribution; Power saving} - G01R 31/3177: Testing of logic operation, e.g. by logic analysers - G01R 31/318563: {Multiple simultaneous testing of subparts} - G01R 31/318335: {Test pattern compression or decompression (compression or decompression of scan patterns G01R31/318547; compression or decompression hardware G01R31/31921)} - G01R 31/318385: {Random or pseudo-random test pattern} - G01R 31/318544: {Scanning methods, algorithms and patterns (G01R31/3183 takes precedence)} - G01R 31/318547: {Data generators or compressors} - G01R 31/318555: {Control logic} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract Aspects of the disclosed technology relate to low power testing. A low power test circuit comprises a test stimulus source, a controller; and a grouping and selection unit. The grouping and selection unit has inputs coupled to the test stimulus source and the controller and has outputs coupled to a plurality of scan chains. The grouping and selection unit is configured to dynamically group scan chains in the plurality of scan chains into a plurality of scan chain groups and to selectively output either original test pattern values generated by the test stimulus source or a constant value to each scan chain group in the plurality of scan chain groups based on control signals received from the controller. ## Claims ### Claim 1 An integrated circuit, comprising: a test stimulus source; a controller; a plurality of scan chains; and a grouping and selection unit having inputs coupled to the test stimulus source and the controller and having outputs coupled to the plurality of scan chains, wherein the grouping and selection unit is configured to dynamically group scan chains in the plurality of scan chains into a plurality of scan chain groups on a cycle-by-cycle basis, a scan-chain-segment-by-scan-chain-segment basis, or a test-pattern-by-test-pattern basis based on control signals received from the controller, wherein the plurality of scan chain groups formed at one shift clock cycle differ from the plurality of scan chain groups formed at least at one other shift clock cycle, and to selectively output either original values in a test pattern outputted by the test stimulus source or a constant value to each scan chain group in the plurality of scan chain groups based on the control signals received from the controller, wherein the constant value replaces the original values in the test pattern directed to at least one but not all of the plurality of scan chain groups during at least a set of continuous shift clock cycles while shifting the test pattern into the plurality of scan chain groups. ### Claim 2 (depends on 1) The integrated circuit recited in claim 1, wherein the test stimulus source is a decompressor configured to receive compressed test pattern values from an external tester or on-chip memory. ### Claim 3 (depends on 1) The integrated circuit recited in claim 1, wherein the test stimulus source is a pseudorandom test pattern generator. ### Claim 4 (depends on 1) The integrated circuit recited in claim 1, wherein the grouping and selection unit comprises a plurality of multiplexers and a plurality of AND/OR gates, wherein the plurality of multiplexers having outputs coupled to some AND/OR gates in the plurality of AND/OR gates. ### Claim 5 (depends on 1) The integrated circuit recited in claim 1, wherein the controller comprises a register storing the control signals. ### Claim 6 (depends on 1) The integrated circuit recited in claim 1, wherein the controller is configured to load control data from an external tester, a storage medium in the integrated circuit, a test generator in the integrated circuit, or some combination thereof. ### Claim 7 (depends on 1) The integrated circuit recited in claim 1, wherein the constant value is supplied by the controller. ### Claim 8 (depends on 1) The integrated circuit recited in claim 1, wherein the constant value received by one scan chain group in the plurality of scan chain groups is different from the constant value received by another scan chain group in the plurality of scan chain groups. ### Claim 9 One or more non-transitory computer-readable media storing computer-executable instructions for causing a computer to perform a method comprising: inserting circuitry into a circuit design, the circuitry comprising: a test stimulus source; a controller; a plurality of scan chains; and a grouping and selection unit having inputs coupled to the test stimulus source and the controller and having outputs coupled to the plurality of scan chains, wherein the grouping and selection unit is configured to dynamically group scan chains in the plurality of scan chains into a plurality of scan chain groups on a cycle-by-cycle basis, a scan-chain-segment-by-scan-chain-segment basis, or a test-pattern-by-test-pattern basis based on control signals received from the controller, wherein the plurality of scan chain groups formed at one shift clock cycle differ from the plurality of scan chain groups formed at least at one other shift clock cycle, and to selectively output either original values in a test pattern outputted by the test stimulus source or a constant value to each scan chain group in the plurality of scan chain groups based on the control signals received from the controller, wherein the constant value replaces the original values in the test pattern directed to at least one but not all of the plurality of scan chain groups during at least a set of continuous shift clock cycles while shifting the test pattern into the plurality of scan chain groups. ### Claim 10 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the test stimulus source is a decompressor configured to receive compressed test pattern values from an external tester or on-chip memory. ### Claim 11 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the test stimulus source is a pseudorandom test pattern generator. ### Claim 12 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the grouping and selection unit comprises a plurality of multiplexers and a plurality of AND/OR gates, wherein the plurality of multiplexers having outputs coupled to some AND/OR gates in the plurality of AND/OR gates. ### Claim 13 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the controller comprises a register storing the control signals. ### Claim 14 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the controller is configured to load control data from an external tester, a storage medium in the integrated circuit, a test generator in the integrated circuit, or some combination thereof. ### Claim 15 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the constant value is supplied by the controller. ### Claim 16 (depends on 9) The one or more non-transitory computer-readable media recited in claim 9, wherein the constant value received by one scan chain group in the plurality of scan chain groups is different from the constant value received by another scan chain group in the plurality of scan chain groups.