# US 10,120,000 B2 · On-chip current sensing employing power distribution network voltage de-convolution > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,120,000 B2 - Document ID: US10120000B2 - Status: Granted - Kind: B2 - Application number: 14/799,664 - Filed: 2015-07-15 - Published: 2017-01-19 - Granted: 2018-11-06 - Earliest claimed: 2015-07-15 - Assignees: Oracle International Corporation - Applicants: Oracle International Corporation - Inventors: Sebastian Turullols - Web page: https://patentgrep.com/patent/US10120000B2 ## CPC - G01R 19/2513: {Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging} - G01R 19/0092: {Measuring current only} - G01R 19/2506: {Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values (G01R19/003 takes precedence); Details concerning sampling, digitizing or waveform capturing (displaying waveforms G01R13/00; analog sampling G01R19/0053)} - G05F 1/10: Regulating voltage or current (G05F1/02 takes precedence) - H03H 7/0153: {Electrical filters; Controlling thereof} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) ## Abstract Systems, methods, and other embodiments are disclosed that are configured to provide on-chip current sensing by employing a power distribution network voltage de-convolution technique. A voltage signal on a voltage plane of a system-on-chip device is measured during operation of the system-on-chip device. The voltage signal derives from a power distribution network. The voltage signal is de-convolved, based at least in part on inverse convolution coefficients derived from the power distribution network, to recover a current signal being drawn by the system-on-chip device from the power distribution network. ## Claims ### Claim 1 A method of sensing a current signal, the method comprising: in a system-on-chip device: measuring a voltage signal on a voltage plane of the system-on-chip device during operation of the system-on-chip device, wherein the voltage signal derives from a power distribution network; de-convolving the voltage signal, based at least in part on inverse convolution coefficients stored within memory of the system-on-chip device and derived from the power distribution network, to recover a current signal being drawn by the system-on-chip device from the power distribution network in a first clock domain, wherein the inverse convolution coefficients, the voltage signal, and a convolution operator are used to determine the current signal, wherein the de-convolving comprises: converting the current signal from the first clock domain in which the current signal was outputted to a second clock domain to synchronize the current signal with the second clock domain for adjusting a parameter of the power distribution network; determining a power consumption of the system-on-chip device based upon the current signal; and adjusting at least one of a clock rate of the system-on-chip device or a supply voltage provided by the power distribution network to the voltage plane based upon the power consumption to reduce an amount of electrical power consumed by the system-on-chip device. ### Claim 2 (depends on 1) The method of claim 1, wherein the inverse convolution coefficients are derived from a transfer function of the power distribution network that characterizes a relationship between the current signal being drawn and the voltage signal on the voltage plane, due to electrical attributes of the power distribution network. ### Claim 3 (depends on 1) The method of claim 1, wherein the measuring includes performing an analog-to-digital conversion operation on the voltage signal. ### Claim 4 (depends on 1) The method of claim 1, wherein the measuring includes performing an anti-aliasing filtering operation on a digital representation of the voltage signal. ### Claim 5 (depends on 1) The method of claim 1, wherein the measuring includes performing a low-pass filtering operation on a digital representation of the voltage signal. ### Claim 6 (depends on 1) The method of claim 1, wherein the measuring includes performing a down-sampling operation on a digital representation of the voltage signal. ### Claim 7 (depends on 1) The method of claim 1, further comprising loading the inverse convolution coefficients into the memory of the system-on-chip device. ### Claim 8 (depends on 1) The method of claim 1, further comprising loading anti-aliasing filter coefficients into the memory of the system-on-chip device. ### Claim 9 (depends on 1) The method of claim 1, further comprising loading down sampling filter coefficients into the memory of the system-on-chip device. ### Claim 10 (depends on 1) The method of claim 1, further comprising adjusting a frequency of operation of the system-on-chip device in response to at least one of the current signal or the power consumption. ### Claim 11 A system-on-chip device, comprising: a voltage plane configured to carry an analog voltage signal derived from a power distribution network; analog-to-digital logic configured to convert the analog voltage signal to a digital voltage signal; de-convolution logic configured to recover a current signal, drawn by the system-on-chip device, from the digital voltage signal based at least in part on inverse convolution coefficients stored within memory of the system-on-chip device and derived from the power distribution network in a first clock domain, wherein the de-convolution logic uses the inverse convolution coefficients, the voltage signal, and a convolution operator to determine the current signal; synchronization logic configured to convert the current signal from the first clock domain in which the current signal was outputted to a second clock domain to synchronize the current signal with the second clock domain for adjusting a parameter of the power distribution; and power management logic configured to: determine a power consumption of the system-on-chip device based upon the current signal; and adjust at least one of a clock rate of the system-on-chip device or a supply voltage provided by the power distribution network to the voltage plane based upon the power consumption to reduce an amount of electrical power consumed by the system-on-chip device. ### Claim 12 (depends on 11) The system-on-chip device of claim 11, wherein the inverse convolution coefficients are derived from an impulse response of the power distribution network which characterizes a relationship between the current signal drawn and the analog voltage signal on the voltage plane, due to electrical attributes of the power distribution network. ### Claim 13 (depends on 11) The system-on-chip device of claim 11, wherein the memory comprises an inverse convolution coefficient memory configured to: store the inverse convolution coefficients; and input the inverse convolution coefficients into the de-convolution logic. ### Claim 14 (depends on 11) The system-on-chip device of claim 11, wherein the power distribution network includes voltage regulation logic configured to regulate the analog voltage signal provided to the voltage plane. ### Claim 15 (depends on 11) The system-on-chip device of claim 11, further comprising anti-aliasing logic configured to low pass filter the digital voltage signal further comprising synchronization logic configured to transform the current signal. ### Claim 16 (depends on 11) The system-on-chip device of claim 11, wherein the power management logic is configured to change an amount of electrical power being consumed by the system-on-chip device in response to at least one of the current signal or the power consumption. ### Claim 17 (depends on 11) The system-on-chip device of claim 11, further comprising anti-aliasing logic configured to low pass filter and down sample the digital voltage signal. ### Claim 18 A method comprising: measuring a voltage signal on a voltage plane of a system-on-chip device during operation of the system-on-chip device, wherein the voltage signal derives from a power distribution network; de-convolving the voltage signal, based at least in part on inverse convolution coefficients stored within memory of the system-on-chip device and derived from the power distribution network, to recover a current signal being drawn by the system-on-chip device from the power distribution network in a first clock domain, wherein de-convolution logic uses the inverse convolution coefficients, the voltage signal, and a convolution operator to determine the current signal, wherein the de-convolving comprises: converting the current signal from the first clock domain in which the current signal was outputted to a second clock domain to synchronize the current signal with the second clock domain for adjusting a parameter of the power distribution network; determining a power consumption of the system-on-chip device based upon the current signal; and adjusting at least one of a clock rate of the system-on-chip device or a supply voltage provided by the power distribution network to the voltage plane based upon the power consumption to reduce an amount of electrical power consumed by the system-on-chip device. ### Claim 19 (depends on 18) The method of claim 18, wherein the inverse convolution coefficients are derived from a transfer function of the power distribution network that characterizes a relationship between the current signal being drawn and the voltage signal on the voltage plane, due to electrical attributes of the power distribution network. ### Claim 20 (depends on 18) The method of claim 18, wherein the measuring includes performing an anti-aliasing filtering operation on a digital representation of the voltage signal.