High density nonvolatile memory cell unit array

A memory cell unit array, comprising

• memory cell units arranged in a two-dimensional matrix form in a first direction and a second direction, the memory cell units being each constituted of
• a plurality of first wires extending in the first direction,
• a plurality of second wires that are disposed separately from the first wires in upper and lower directions and extend in the second direction unlike the first wires, and
• a nonvolatile memory cell that is disposed in a region in which the first wires and the second wires overlap one another and connected to the first wires and the second wires, wherein
• each of the memory cell units includes, below the memory cell unit, a control circuit that controls an operation of the memory cell unit,
• the control circuit is constituted of
• a first control circuit that controls an operation of the nonvolatile memory cell that constitutes the memory cell unit via the first wires, and
• a second control circuit that controls an operation of the nonvolatile memory cell that constitutes the memory cell unit via the second wires,
• the second wires that constitute the memory cell unit are connected to the second control circuit that constitutes the memory cell unit,
• some of the first wires that constitute the memory cell unit are connected to the first control circuit that constitutes the memory cell unit, and
• others of the first wires that constitute the memory cell unit are connected to a first control circuit that constitutes an adjacent memory cell unit adjacent thereto in the first direction.