Semiconductor arrangement, semiconductor system and method of forming a semiconductor arrangement

A semiconductor system comprising a plurality of semiconductor arrangements, each semiconductor arrangement comprising:

• an electrically conductive plate having a top surface;
• a plurality of power semiconductor devices arranged on the top surface of the electrically conductive plate, wherein a first controlled terminal of each power semiconductor device of the plurality of power semiconductor devices is electrically coupled to the electrically conductive plate;
• a plurality of electrically conductive blocks, each electrically conductive block being electrically coupled with a respective second controlled terminal of each power semiconductor device of the plurality of power semiconductor devices;
• and
• encapsulation material encapsulating the plurality of power semiconductor devices, wherein at least one edge region of the top surface of the electrically conductive plate is free from the encapsulation material.

A method of forming a semiconductor arrangement, the method comprising:

• arranging a plurality of power semiconductor devices on a top surface of an electrically conductive plate;
• electrically coupling a first controlled terminal of each power semiconductor device of the plurality of power semiconductor devices to the electrically conductive plate;
• electrically coupling each electrically conductive block of a plurality of electrically conductive blocks with a respective second controlled terminal of each power semiconductor device of the plurality of power semiconductor devices;
• and
• encapsulating the plurality of power semiconductor devices with encapsulation material such that at least one edge region of the top surface of the electrically conductive plate is free from the encapsulation material.