Digital low drop-out regulator

An integral control circuit comprising:

• an error calculation element suitable for generating a plurality of magnitude signals by receiving an error code and performing a magnitude calculation on the error code, and outputting a middle bit of the error code as an error sign signal;
• a counting element suitable for outputting a counting signal having time information by performing a counting operation at a predetermined cycle, and generating a stick pulse signal by checking the magnitude signals whenever the counting signal is outputted;
• an integral control signal generation element suitable for generating a plurality of integral control signals corresponding to the magnitude signals based on the stick pulse signal;
• a proportional control signal generation element suitable for generating a plurality of integral control signals corresponding to the magnitude signals based on the stick pulse signal;
• a pulse encoding element suitable for generating the integral pulse signals by primarily shifting the integral control signals based on the counting signal and secondarily shifting the shifted signals based on the integral gain factor;
• and
• a code output element suitable for shifting a pre-stored code value based on the integral pulse signals, and outputting a plurality of output control signals by controlling a shifting direction based on the error sign signal.