Thermal oxide equivalent low temperature ALD oxide for dual purpose gate oxide and method for producing the same

A method comprising:

• providing a high voltage input/output (HV I/O) and a core logic laterally separated on a silicon (Si) substrate, each HV I/O and core logic having a fin;
• forming a first gate oxide layer to a thickness of 30 angstrom (A) to 45 Å over each fin and the Si substrate by plasma-enhanced atomic layer deposition (PEALD) or thermal ALD at a temperature of 385° C. to 425° C., and performing a remote plasma treatment using O2 or O3 gas to generate radical O2 for ALD SiO2 growth;
• forming a first silicon oxy-nitride layer over the first gate oxide layer by plasma nitridation at a room temperature and up to 450° C. with 9% to 12% of nitrogen (N) and post nitridation annealing at a temperature of 900° C. to 1000° C. for 30 seconds to 60 seconds;
• forming a sacrificial oxide layer over the silicon oxy-nitride layer by PEALD;
• removing the sacrificial oxide and first silicon oxy-nitride layers by dilute hydrofluoric acid (dHF) etching;
• thinning the gate oxide layer to a thickness of 22 Å to 35 Å by wet etching;
• forming a second gate oxide layer to a thickness of 1 Å to 35 Å over the thinned gate oxide layer by PEALD or thermal ALD;
• forming a second silicon oxy-nitride layer over the second gate oxide layer;
• removing the second silicon oxy-nitride and gate oxide layers over the core logic fin and a portion of the Si substrate by ultraviolet (UV) lithography and dHF etching, respectively;
• forming an interfacial layer (IL) to a thickness of 6 Å to 12 Å over the core logic fin and the portion of the Si substrate by O3/HCL process;
• and
• forming a hafnium oxide (HfOx) layer to a thickness of 15 Å to 28 Å over the second silicon oxy-nitride layer and ILs by ALD.