Dispatching method and system

A computer-implemented system for dispatching wafer lots through a plurality of process chambers, wherein the process chambers are disposed in a machine, wherein the system comprises at least one processor and at least one memory, the system further comprising:

• a computing module and a dispatching module, wherein the computing module comprises a first computing module and a second computing module;
• the computing module is configured to receive wafer lot information, process chamber data, and historical data of run lots previously processed through the process chambers, wherein the wafer lot information identifies the wafer lots to be processed at the machine, and the process chamber data includes process information associated with the process chambers;
• the first computing module is configured to determine a load factor of each process chamber based on the wafer lot information and process chamber data;
• the second computing module is configured to determine a processing time of the wafer lots based on the historical data;
• and
• the dispatching module is configured to generate a dispatching criteria for the wafer lots based on the load factors of the process chambers and the determined processing time of the wafer lots, and dispatch the wafer lots through the process chambers based on the dispatching criteria
• wherein the dispatching module comprises a first dispatching module and a second dispatching module;
• the first dispatching module is configured to dispatch the wafer lots to the process chambers operating in parallel mode;
• and
• the second dispatching module is configured to dispatch the wafer lots to the process chambers operating in serial mode;
• wherein the first dispatching module comprises a first dispatching sub-unit and a second dispatching sub-unit;
• the first dispatching sub-unit is configured to dispatch the wafer lots to the process chambers subject to the same process conditions;
• and
• the second dispatching sub-unit is configured to dispatch the wafer lots to the process chambers subject to different process conditions
• wherein when the process chambers are operated in parallel mode, and the process chambers are subject to the same process conditions:
• the dispatching module is configured to receive the load factors of the process chambers and the determined processing time of the wafer lots, and determine, based on the load factors and the determined processing time, whether the machine is in a wafer pile-up state;
• if the machine is in the wafer pile-up state:
• the first dispatching sub-unit is configured to dispatch the wafer lots based on a first criterion and then a second criterion, wherein the first criterion defines the wafer lot having the shortest processing time, and the second criterion defines the wafer lot that requires processing in the most number of process chambers;
• if the machine is not in the wafer pile-up state:
• the first dispatching sub-unit is configured to dispatch the wafer lots based on the second criterion and then the first criterion.

A set of tangible, non-transitory computer readable medium storing instructions that, when executed by one or more computer-implemented modules and at least one processor and at least one memory, cause the one or more computer-implemented modules to perform a method of dispatching wafer lots through a plurality of process chambers, wherein the process chambers are disposed in a machine, and wherein the one or more computer-implemented modules comprises a dispatching module and a computing module including a first computing module and a second computing module, the method comprising:

• receiving, using the computing module, wafer lot information, process chamber data, and historical data of run lots previously processed through the process chambers, wherein the wafer lot information identifies the wafer lots to be processed at the machine, and the process chamber data includes process information associated with the process chambers;
• determining, using the first computing module, a load factor of each process chamber based on the wafer lot information and process chamber data;
• determining, using the second computing module, a processing time of the wafer lots based on the historical data;
• and
• generating, using the dispatching module, a dispatching criteria for the wafer lots based on the load factors of the process chambers and the processing time of the wafer lots determined by the first and second computing modules, and dispatching the wafer lots through the process chambers based on the dispatching criteria;
• wherein generating the dispatching criteria and dispatching the wafer lots comprises:
• determining, based on the load factors of the process chambers and the determined processing time of the wafer lots, whether the machine is in a wafer pile-up state;
• if the machine is in the wafer pile-up state:
• dispatching the wafer lots so as to first maximize an output of the machine, and then to maximize usage of the process chambers;
• if the machine is not in the wafer pile-up state:
• dispatching the wafer lots to maximize the usage of the process chambers.