Equalization circuit, semiconductor apparatus and semiconductor system using the same

A semiconductor apparatus comprising:

• a memory cell array, and a core block configured to write data in the memory cell array or read out data from the memory cell array;
• an enable control block configured to generate an equalization enable signal according to stack information, the stack information including a number of semiconductor apparatuses in a stack;
• and
• an equalization circuit configured to generate a reference voltage according to a delayed input signal, equalize an input signal according to the reference voltage, and provide the equalized input signal to the core block, when the equalization enable signal is enabled,
• wherein the equalization circuit includes a feedback delay compensator configured to generate the delayed input signal by delaying the input signal by a predetermined time.