Low power supply voltage double-conversion radio frequency receiving front end

A low power supply voltage double-conversion radio frequency receiving front end, comprising:

• a low voltage radio frequency transconductance amplifier;
• a pair of double-conversion frequency mixing switches;
• and
• a transimpedance amplifier,
• wherein the double-conversion frequency mixing switches are coupled between the low voltage radio frequency transconductance amplifier and the transimpedance amplifier and shift low input impedance of the transimpedance amplifier to an intermediate frequency, so as to construct a band-pass filtering function for radio frequency current, and
• the radio frequency current which has undergone two frequency conversions of the double-conversion frequency mixing switches is converted into an output intermediate frequency voltage via the transimpedance amplifier,
• wherein said low voltage radio frequency transconductance amplifier comprises a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, a second PMOS transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor R6, a first reference current source and a second reference current source, wherein
• a gate electrode and a drain electrode of the first NMOS transistor are short-connected, and a source electrode is grounded;
• a source electrode of the second NMOS transistor is grounded, a gate electrode is connected to a positive electrode of the fifth resistor, and a drain electrode is connected to a drain electrode of the first PMOS transistor;
• a negative electrode of the fifth resistor is connected to the drain electrode of the first NMOS transistor;
• a source electrode of the third NMOS transistor is grounded, a gate electrode is connected to a positive electrode of the sixth resistor, and a drain electrode is connected to a drain electrode of the second PMOS transistor;
• a negative electrode of the sixth resistor is connected to the drain electrode of the first NMOS transistor;
• a source electrode of the first PMOS transistor is connected to a power supply, and a gate electrode is connected to a positive electrode of the first resistor;
• a source electrode of the second PMOS transistor is connected to the power supply, and a gate electrode is connected to a positive electrode of the second resistor;
• a positive electrode of the first capacitor is connected to the drain electrode of the first NMOS transistor, and a negative electrode is grounded;
• a positive electrode of the second capacitor is connected to an input voltage positive electrode, and a negative electrode is connected to a gate electrode of the third NMOS transistor;
• a positive electrode of the third capacitor is connected to an input voltage negative electrode, and a negative electrode is connected to the gate electrode of the second NMOS transistor;
• a positive electrode of the fourth capacitor is connected to the gate electrode of the second NMOS transistor, and a negative electrode is connected to the gate electrode of the first NMOS transistor;
• a positive electrode of the fifth capacitor is connected to the gate electrode of the third NMOS transistor, and a negative electrode is connected to the gate electrode of the second NMOS transistor;
• a positive electrode of the first reference current source is connected to the power supply, and a negative electrode is connected to the drain electrode of the first NMOS transistor;
• a positive electrode of the second reference current source is connected to a negative electrode of the first resistor, a negative electrode of the second resistor, a negative electrode of the third resistor and a negative electrode of the fourth resistor, and a negative electrode is grounded;
• and a positive electrode of the third resistor is connected to the drain electrode of the first PMOS transistor, and a positive electrode of the fourth resistor is connected to the drain electrode of the second PMOS transistor.