Digital synthesizer, radar device and method therefor

A radar device having a digital synthesizer comprising:

• a ramp generator configured to generate a signal of frequency control words, FCW, that describes a desired frequency modulated continuous wave;
• a digitally controlled oscillator, DCO configured to receive the FCW signal and generate a DCO output signal;
• a feedback loop comprising a time-to-digital converter, TDC, wherein the feedback loop is configured to feed back the DCO output signal;
• and
• a phase comparator coupled to the ramp generator and configured to compare a phase of the FCW signal output from the ramp generator with the DCO output signal fed back from the DCO via the feedback loop and output a N-bit oscillator control signal in response thereto;
• and
• wherein the digital synthesizer is characterized in that:
• the TDC receives a representation of the DCO output signal and a reference frequency signal to sample the DCO output signal and outputs multiple selectable delays of the DCO output signal;
• a digital synthesizer circuit sensor is configured to sense an operational condition of the digital synthesizer circuit and select one of the multiple selectable delays output from the TDC in response to the sensed operational condition;
• and
• a re-timer circuit is coupled to the digital synthesizer circuit sensor and configured to synchronize the selected delayed DCO output signal with the reference frequency signal.

A method for generating modulation signals in a digital phase locked loop, DPLL, using a re-timer for synchronization that is insensitive to component tolerances, the method comprising:

• generating a signal of frequency control words, FCW, that describes a desired frequency modulated continuous wave;
• generating a digitally controlled oscillator, DCO, output signal in response to the FCW signal;
• feeding back the DCO output signal via a time-to-digital converter, TDC;
• and
• comparing a phase of the FCW signal with the DCO output signal and, in response thereto, outputting a N-bit oscillator control signal;
• wherein the method is characterised by:
• sampling the DCO output signal using a reference frequency signal to generate multiple selectable delays of the DCO output signal;
• sensing an operational condition of the digital synthesizer circuit;
• selecting one of multiple selectable delays output from the TDC in response to the sensed operational condition;
• and
• synchronizing the selected delayed DCO output signal with the reference frequency signal.