Control circuit, control method and flyback converter

#The present disclosure generally relates to the field of power electronics, and more particularly to control circuits and methods for a flyback converter.

#For a switch-type converter, a constant on time control mode can be adopted in order to achieve a higher power factor. This is because a proportion factor of an input current and an input voltage is in direct proportion to a ratio of a square value of an on time and a switching period. Thus, once the on time is fixed, the input current may follow the input voltage when the switching period changes slightly in a full power frequency cycle, so as to obtain a relatively high power factor correction (PFC). Therefore, constant on time controlled converter are widely used in many power factor regulating applications.

#In one embodiment, a control circuit configured to control a power stage circuit of a flyback converter, can include: (i) a voltage feedback circuit configured to obtain a voltage feedback signal that represents an output voltage of the power stage circuit; (ii) a set signal generator configured to output a set signal when a secondary current crosses zero or a voltage sampling signal reaches a valley value; (iii) a reset signal generator configured to output a reset signal in a constant on time mode when the voltage feedback signal is greater than a first voltage threshold value, and to output the reset signal in a peak current mode when the voltage feedback signal is less than the first voltage threshold value; and (iv) a logic circuit configured to activate a switching control signal according to the set signal, and to deactivate the switching control signal according to the reset signal, where the switching control signal is configured to control a power switch of the power stage circuit.

#FIG. 1 is a schematic block diagram of an example flyback converter, in accordance with embodiments of the present invention.

#FIG. 2 is a schematic block diagram of an example reset signal generator, in accordance with embodiments of the present invention.

#FIG. 3 is a schematic block diagram of an example set signal generator, in accordance with embodiments of the present invention.

#Reference may now be made in detail to particular embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention may be described in conjunction with the preferred embodiments, it may be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it may be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, processes, components, structures, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention.

#If a switch-type converter adopts a constant on time mode to start, or to switch a load when outputting a constant voltage, the on time may be the same, regardless of the value of the input voltage. Because the energy required for starting a converter or switching the input voltage of a converter differs under different input voltages, the starting speed or switching speed may be relatively slow.

#In one embodiment, a control circuit configured to control a power stage circuit of a flyback converter, can include: (i) a voltage feedback circuit configured to obtain a voltage feedback signal that represents an output voltage of the power stage circuit; (ii) a set signal generator configured to output a set signal when a secondary current crosses zero or a voltage sampling signal reaches a valley value; (iii) a reset signal generator configured to output a reset signal in a constant on time mode when the voltage feedback signal is greater than a first voltage threshold value, and to output the reset signal in a peak current mode when the voltage feedback signal is less than the first voltage threshold value; and (iv) a logic circuit configured to activate a switching control signal according to the set signal, and to deactivate the switching control signal according to the reset signal, where the switching control signal is configured to control a power switch of the power stage circuit.