MOSFET and method for manufacturing the same

A MOSFET, comprising

• an SOI wafer comprising a semiconductor substrate, a buried insulating layer on the semiconductor substrate, and a semiconductor layer on the buried insulating layer;
• a gate stack on the semiconductor layer;
• a source region and a drain region in the semiconductor layer on both sides of the gate stack;
• a channel region in the semiconductor layer and located between the source region and the drain region;
• and
• a back gate located in the semiconductor substrate, the back gate having three regions including a first doped region as a lower portion of the back gate electrically connected to at least one conductive via, a second doped region as an upper portion of the back gate, and an anti-doped region in the second doped region of the back gate below the channel region,
• wherein the second doped region of the back gate is self-aligned with the gate stack;
• wherein the anti-doped region is self-aligned with the gate stack, and wherein an interface between the anti-doped region and the second doped region has a distance to outer side surfaces of the second doped region.