Integrated circuit device and method of manufacturing the same

An integrated circuit (IC) device, comprising:

• a pair of fin-shaped active areas that are adjacent to each other with a fin separation area therebetween, the pair of fin-shaped active areas extend in a line along a first direction, and the fin separation area having a first width in the first direction;
• a fin separation insulating structure in the fin separation area between the pair of fin-shaped active areas, the fin separation insulating structure including a lower insulating pattern and an upper insulating pattern on the lower insulating pattern, the upper insulating pattern extending in a second direction that intersects the first direction, and the upper insulating pattern having a convex rounded top surface profile and having a second width greater than the first width in the first direction;
• a normal gate that extends in the second direction in a first fin-shaped active area selected from the pair of fin-shaped active areas;
• and
• a semiconductor epitaxial pattern on a region of the first fin-shaped active area between the normal gate and the fin separation insulating structure, the semiconductor epitaxial pattern being spaced apart from the fin separation insulating structure,
• wherein top surfaces of the first fin-shaped active area at opposite sides of the semiconductor epitaxial pattern have different heights.

An integrated circuit (IC) device, comprising:

• a pair of fin-shaped active areas that are adjacent to each other with a fin separation area therebetween;
• a normal gate that intersects at least one of the pair of fin-shaped active areas;
• a source/drain area adjacent the normal gate;
• and
• a fin separation insulating structure in the fin separation area, the fin separation insulating structure including:
• a lower insulating pattern overlapping at least a portion of the source/drain area, and
• an upper insulating pattern on the lower insulating pattern and overlapping at least a portion of the source/drain area, the upper insulating pattern having a larger width than the lower insulating pattern, and having a top surface at a level higher than a top surface of each of the pair of fin-shaped active areas.