A method for forming an integrated circuit component, comprising:
- providing an integrated circuit element on a substrate;
- forming an energy harvesting component on the substrate, the energy harvesting component having a stacked configuration on the substrate totaling less than 100 pm;
- forming an energy harvesting element of the energy harvesting component by:
- forming a first conductor layer of a conductive material on the substrate;
- forming a low work function layer on a facing surface of the first conductor layer;
- arranging a second conductor layer formed of a conductive material to have a facing surface facing the low work function layer with a gap formed between the low work surface layer and the facing surface of the second conductor layer, the gap being in a range of 100 nm or less in thickness in a direction orthogonal to the facing surface of the second conductor layer, the facing surface of the second conductor having a work function substantially higher than a work function of the low work function layer;
- forming a dielectric layer in the gap, the dielectric layer having a thickness in a range of 20 nm to 60 nm, and being sandwiched between the low work function layer and the facing surface of the second conductor layer;
- and
- electrically connecting the energy harvesting component to the integrated circuit element, the energy harvesting component being configured to generate and electric potential at any temperature above absolute zero for powering the integrated circuit element.