Back to results
US 10,096,617 B2Granted
Three-dimensional structured memory devices
AssigneeMicron Technology, Inc.
InventorsKi Hong Lee, Seung Ho Pyi, Il Young Kwon, Jin Ho Bin
Life of this patent
Estimating the term…
Abstract
A 3D structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain region; a p+ region at the source/drain region; and a diffusion barrier material between the n+ region and the p+ region. The n+ region is substantially isolated from the p+ region.
Claims20
A three-dimensional structured memory device, comprising:
- levels of a first conductive material alternating with levels of a first dielectric material such that each level of conductive material is separated from another level of conductive material by a level of dielectric material;
- a channel material formed through the alternating levels over sidewalls of the alternating levels;
- a second dielectric material formed within the channel material, the second dielectric material having a portion recessed to the channel material on the sidewalls, the channel material proximate to the recessed portion being doped with a dopant of a first polarity and having a diffusion barrier formed thereover;
- and
- a second conductive material formed in the recessed portion and over the diffusion barrier, the second conductive material being doped with a second dopant having a polarity opposite that of the first dopant.
2 more elements
A method, comprising:
- forming levels of a first conductive material and levels of a first dielectric material such that each level of conductive material is separated from another level of conductive material by a level of dielectric material;
- forming an opening through the levels of the conductive material and levels of dielectric material, the opening having sidewalls;
- forming a channel material over the sidewalls within the opening;
- forming a second dielectric material over the channel material and at least partially filling the opening;
- recessing an uppermost portion of the second dielectric material to expose portions of the channel material;
- doping, with a dopant material having a first polarity, exposed portions of the channel material not covered by the second dielectric material;
- forming a diffusion barrier over an uppermost portion of the second dielectric material and the doped channel material;
- forming a second conductive material in the recessed portion and over the diffusion barrier;
- and doping the second conductive material with a second dopant having a polarity opposite that of the first dopant.
6 more elements
A method, comprising:
- forming an opening through a device structure;
- forming a channel material over sidewalls of the opening;
- forming an inter-dielectric material over the channel material;
- selectively recessing a portion of the inter--dielectric material to expose a region of the channel material;
- doping the exposed region to form an n-type doped region;
- forming a diffusion barrier layer over the n-type doped region;
- and
- at least partially filling a remaining portion of the recessed portion with a p-type doped material.
5 more elements
Dependencies are inferred from the claim text.