Stacked three-dimensional arrays of two terminal nanotube switching devices

A three-dimensional nonvolatile memory array comprising:

• a plurality of stacked nonvolatile memory sub-arrays, said sub-arrays including:
• a plurality of bit line segments;
• a plurality of word lines segments;
• and
• a plurality of two terminal nanotube switching devices, each of said two terminal nanotube switching devices having:
• a first conductive terminal in electrical communication with a bit line segment;
• a nanotube fabric article disposed above and in electrical communication with said first conductive terminal;
• and
• a second terminal disposed above and in electrical communication with said nanotube fabric article and in electrical communication with a word line segment;
• wherein said nanotube fabric article is adjustable among at least two resistive states responsive to electrical stimuli applied across said first and second conductive terminals and wherein said resistive states correspond to informational states;
• a plurality of word lines, each of said word lines in electrical communication with at least one word line segment within at least one sub-array;
• a plurality of bit lines, each of said bit lines in electrical communication with at least one bit line segment within at least one sub-array;
• and
• a memory operation circuit in electrical communication with said plurality of words lines and said plurality of bit lines, said memory operation circuit capable of addressing each two terminal nanotube switching device within said array through a combination of one of said plurality of word lines and one of said plurality of bit lines;
• wherein said memory operation circuit includes elements capable of applying electrical stimuli to one or more selected two-terminal switching devices sufficient to adjust said one or more selected two-terminal switching devices from a first resistive state to a second resistive state;
• and
• wherein said memory operation circuit includes elements capable of detecting a resistive state of one or more selected two-terminal switching devices.