Thermal pads between stacked semiconductor dies and associated systems and methods
AssigneeMicron Technology, Inc.
InventorsJaspreet S. Gandhi, Michel Koopmans
Life of this patent
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Abstract
Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
Claims17
A method of manufacturing a semiconductor die having a silicon material and a through-silicon via (TSV) extending through the silicon material, comprising;
- disposing a first mask at least partially over a first side of the silicon material of the die;
- patterning the first mask to expose the first side of the silicon material about the TSV;
- etching the first side of the silicon material to at least partially expose sidewalls of the TSV;
- forming a passivation material over the first side of the silicon material such that the passivation material has an opening through which the silicon material is exposed;
- depositing a metal material in the opening through the passivation material at the first side of the silicon material to form a thermal pad;
- and
- forming an under-bump metallization (UBM) structure at least partially around the exposed sidewalls of the TSV,
- wherein the thermal pad has a first surface facing the first side of the silicon material and a second surface facing away from the first side of the silicon material, the UBM structure has a first surface facing the first side of the silicon material and a second surface facing away from the first side of the silicon material, and the second surface of the UBM structure and the second surface of the thermal pad are generally coplanar.
A method of manufacturing a semiconductor die having a silicon material and a through-silicon via (TSV) extending at least partially through the silicon material, comprising:
- etching a first side of the silicon material to expose sidewalls of the TSV;
- forming a passivation material over the first side of the silicon material such that the passivation material has an opening through which the silicon material is disposed;
- depositing a metal material in the opening through the passivation material to form a thermal pad;
- forming an under-bump metallization (UBM) structure at least partially around the exposed sidewalls of the TSV;
- and
- removing the passivation material around the thermal pad,
- wherein the thermal pad has a first surface facing the first side of the silicon material and a second surface facing away from the first side of the silicon material, the UBM has a first surface facing the first side of the silicon material and a second surface facing away from the first side of the silicon material, and
- the second surface of the UBM and the second surface of the thermal pad are generally coplanar.
Dependencies are inferred from the claim text.