Chip-on-wafer package and method of forming same

A method comprising:

• physically bonding a die to a substrate, wherein an interface of the die and substrate is free of conductive materials;
• surrounding the die with an insulating material;
• patterning a first opening and a second opening in the substrate to expose a first redistribution structure of the substrate;
• extending the first opening through the first redistribution structure to expose a first conductive element in the first redistribution structure and a second conductive element in a second redistribution structure of the die;
• after extending the first opening, depositing an isolation layer in the first opening and the second opening;
• etching the isolation layer to form spacers on sidewalls of the first and second openings;
• and
• depositing a conductive material in the first and second openings, the conductive material electrically coupling the first conductive element to the second conductive element.

A method comprising:

• providing a first substrate having a first redistribution structure disposed on a first side of the first substrate, wherein first conductive elements are disposed in the first redistribution structure;
• providing a second substrate having a second redistribution structure disposed thereon, the first redistribution structure bonded to the second redistribution structure, wherein second conductive elements are disposed in the second redistribution structure;
• etching a first via opening through at least the first substrate;
• forming an isolation layer over the first substrate and extending into the first via opening;
• etching the isolation layer, the etching forming spacers on sidewalls of the first via opening, at least one of the spacers extending through the first substrate and having a bottom surface disposed on at least one of the first conductive elements;
• and
• forming a first via in the first via opening and electrically connected to at least one of the first conductive elements;
• wherein the first via extends from one of the first conductive elements through the first substrate to at least a second side of the first substrate, the second side being opposite the first side;
• and
• wherein one or more of the spacers are interposed between the first substrate and the first via and electrically insulate the first via from the first substrate.