Semiconductor devices having interconnection structure

A semiconductor device comprising:

• an etch stop layer on a lower structure;
• an intermetal insulating layer on the etch stop layer, the intermetal insulating layer comprising a low-k dielectric material;
• and
• a first interconnection structure and a second interconnection structure adjacent to each other,
• wherein the intermetal insulating layer comprises a first region that is spaced apart from the first and second interconnection structures and has a first dielectric constant, and second regions that contact the first and second interconnection structures and have a second dielectric constant different from the first dielectric constant of the first region,
• wherein the first interconnection structure comprises a first plug portion and a first interconnection portion on the first plug portion, and the second interconnection structure comprises a second plug portion and a second interconnection portion on the second plug portion,
• wherein each of the first plug portion and the second plug portion comprises a lower portion contacting the etch stop layer and an upper portion contacting the intermetal insulating layer, and
• wherein a distance between respective sidewalls of the lower portions of the first plug portion and the second plug portion is greater than a distance between respective sidewalls of the upper portions of the first plug portion and the second plug portion.

An integrated circuit device comprising:

• an etch stop layer on a lower structure, the etch stop layer comprising an opening exposing the lower structure;
• an insulating layer comprising a low-k material on the etch stop layer, the insulating layer comprising a recess, and the insulating layer comprising a first portion that defines the recess and has a first dielectric constant and a second portion that is different from the first portion and has a second dielectric constant less than the first dielectric constant;
• and
• a conductive structure in the recess of the insulating layer and in the opening of the etch stop layer.