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US 10,096,525 B2Granted
Method for fabricating self-aligned contact in a semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Kuo-Yi Chao
Life of this patent
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Abstract
A semiconductor device includes a gate structure disposed over a substrate, and sidewall spacers disposed on both side walls of the gate structure. The sidewall spacers includes at least four spacer layers including first to fourth spacer layers stacked in this order from the gate structure.
Claims20
A semiconductor device comprising:
- a gate structure disposed over a substrate;
- a source/drain region;
- and
- sidewall spacers disposed on both side walls of the gate structure, wherein:
- the sidewall spacers includes at least four spacer layers including first to fourth spacer layers stacked in this order from the gate structure,
- an oxide layer partially covers an upper surface of the source/drain region, and
- the third and fourth spacer layers land on the oxide layer and separated from the source/drain region by the oxide layer.
4 more elements
A method of manufacturing a semiconductor device, the method comprising:
- forming a gate structure having a mask layer over a substrate;
- forming a first sidewall spacer layer on a sidewall of the gate structure;
- forming a source/drain region;
- removing the mask layer, thereby forming a second sidewall spacer layer made of an oxide on the first sidewall spacer layer and an oxide cover layer covering an upper surface of the source/drain region;
- forming a third sidewall spacer layer on the second sidewall spacer layer,
- wherein the third spacer layer land on the oxide layer and separated from the source/drain region by the oxide layer.
3 more elements
A method of manufacturing a semiconductor device, the method comprising:
- forming a dummy gate structure with a mask layer disposed thereon over a substrate;
- forming a first insulating layer over the dummy gate structure;
- implanting first ions through the first insulating layer;
- forming one or more second insulating layers over the first insulating layer;
- etching the first insulating layer and one or more second insulating layers, thereby forming a first sidewall spacer layer on a sidewall of the dummy gate structure;
- removing the mask layer, thereby forming an oxide layer, as a second sidewall spacer layer, on the first sidewall spacer layer;
- forming a third sidewall spacer layer on the second sidewall spacer layer;
- and
- forming a contact etching stop layer on the third sidewall spacer layer and the substrate.
6 more elements
Dependencies are inferred from the claim text.