Shift register and driving method therefor, gate driver on array circuit and display device
AssigneesBoe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
InventorJunwei Wang
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AssigneesBoe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
InventorJunwei Wang
Estimating the term…
A shift register, a method for driving a shift register, a gate driver on array (GOA) circuit and a display device are provided. It relates to the field of display technology and solves nonuniform display due to inadequate gate signal in large-sized GOA display products. The shift register for the GOA circuit includes a pulling up (PU) node, a capacitor and an output control module. The output control module comprises a first thin film transistor. A control end of the first thin film transistor is connected to a first end of the capacitor via the PU node, a first clock signal is input to a first end of the first thin film transistor, and a second end of the first thin film transistor is connected to a second end of the capacitor. The shift register further includes a pre-charging module, used to receive a signal from the PU node and output, before the shift register outputs a valid voltage, a pre-charging voltage having an identical polarity to the valid voltage to an output terminal of the shift register.
A shift register, comprising a pulling up (PU) node, a capacitor and an output control module, wherein the output control module comprises a first thin film transistor, a control end of the first thin film transistor is connected to a first end of the capacitor via the PU node, a first clock signal is input to a first end of the first thin film transistor, and a second end of the first thin film transistor is connected to a second end of the capacitor;
A gate driver on array (GOA) circuit, comprising a plurality of shift registers, wherein each shift register comprises a pulling up (PU) node, a capacitor and an output control module, wherein the output control module comprises a first thin film transistor, a control end of the first thin film transistor is connected to a first end of the capacitor via the PU node, a first clock signal is input to a first end of the first thin film transistor, and a second end of the first thin film transistor is connected to a second end of the capacitor;
A method for driving a shift register, wherein the shift register comprises a pulling up (PU) node, a capacitor and an output control module, wherein the output control module comprises a first thin film transistor, a control end of the first thin film transistor is connected to a first end of the capacitor via the PU node, a first clock signal is input to a first end of the first thin film transistor, and a second end of the first thin film transistor is connected to a second end of the capacitor;
Dependencies are inferred from the claim text.