Power supply circuit and semiconductor storage device

A semiconductor storage device that includes a power supply circuit that includes a charge pump unit for generating a boosted voltage by boosting a source voltage;

• a memory cell array in which memory cells are formed at intersections of a plurality of word lines and a plurality of bit lines crossing each of the word lines;
• and a row decoder for supplying a selection voltage to each of the word lines based on the boosted voltage,
• wherein the power supply circuit comprises:
• a voltage monitoring unit, performing comparison and determination on magnitudes of a divided voltage obtained by dividing the boosted voltage and a predetermined reference voltage;
• a charge pump control unit, causing the charge pump unit to operate when the divided voltage is equal to or lower than the reference voltage based on a result of the comparison and determination and causing an operation of the charge pump unit to stop when the divided voltage is higher than the reference voltage based on a result of the comparison and determination;
• and
• a voltage monitoring control unit, causing the voltage monitoring unit to intermittently stop.