A display controller for controlling a display device, the display controller comprising:
- image processing logic configured to sequentially read a plurality of input image data via a data bus and process the plurality of input image data;
- a timing generator configured to output a timing control signal;
- a compensation image generator configured to generate and output a compensation image according to the timing control signal;
- a data interface configured to transmit one of the compensation image and the plurality of input image data to the display device based on the timing control signal;
- and
- a register configured to store a frame count enable signal and a frame skip rate,
- wherein the timing generator includes a frame counter configured to count a number of frames of the plurality of input image data and output the timing control signal if a result of counting the number of frames is equal to the frame skip rate in a state in which the frame count enable signal is enabled.