Transistor level low power verification for mixed signal circuit design
AssigneeCadence Design Systems, Inc.
InventorsQingyu Lin, Nan Zhang, Kun Zhang
Life of this patent
Estimating the term…
Loading patent…
AssigneeCadence Design Systems, Inc.
InventorsQingyu Lin, Nan Zhang, Kun Zhang
Estimating the term…
Electronic design automation systems, methods, and computer readable media are presented for the generation of power-related connectivity data by an analog simulator (for example, by propagating the power supply data and/or ground data through the circuit components of the analog design schematic). In some embodiments, the verification module determines consistency between different versions of power-related connectivity data, such as: (i) power-related connectivity data from the analog design schematic and (ii) power-related connectivity data from the power-related data characterizing the mixed-signal design. Such verification determines whether the mixed-signal design satisfies the low power specification as expressed in the power-related data characterizing the mixed-signal design.
A method comprising:
A non-transitory computer-readable medium embodying instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
An electric design automation (EDA) computing device comprising:
Dependencies are inferred from the claim text.