System and method to provide single thread access to a specific memory region

A non-transitory machine-readable medium, which is not a signal bearing medium, having stored thereon data, which if executed by a processor, causes the processor to perform a method, the method comprising:

• allocating a predetermined range of memory locations, the memory locations including a first model specific register within a processor to provide storage for a mutex token and a plurality of second memory locations stored within a second model specific register, each to provide temporary data storage;
• reading, by a first requester of a plurality of requesters attempting to access the plurality of second memory locations, the first memory location to determine availability of the mutex;
• if the mutex is available, allowing possession of the mutex by only the first requester;
• enabling read/write access to the first requester to the plurality second memory locations without suspending processing activity for all other cores and the plurality of requestors within the processor:
• if the mutex is unavailable, denying possession of the mutex by the first requester;
• checking ownership of the mutex by a second requester attempting to access the plurality of second memory locations;
• if the second requester owns the mutex, allowing the second requester access to the plurality of second memory locations;
• and
• if the second requester does not own the mutex, denying the second requester access to the plurality of second memory locations and returning a predetermined error code to the second requester, the error code indicating an invalid attempt to access the plurality of second memory locations, the predetermined error code causing the non-possessing requester to poll the mutex for availability after a predetermined period of time during which the non-possessing requester performs other processing tasks.

A method, comprising:

• allocating a predetermined range of memory locations within a processor, the memory locations including a first memory location to provide storage for a mutex token and a plurality of second memory locations, each to provide temporary data storage, wherein the predetermined range of memory locations are model specific registers within the processor;
• reading, by a first requester attempting to access the plurality of second memory locations, the first memory location to determine availability of the mutex;
• if the mutex is available, allowing possession of the mutex by the first requester;
• enabling read/write access to the first requester to the plurality second memory locations;
• if the mutex is unavailable, denying possession of the mutex by the first requester;
• checking ownership of the mutex by a second requester attempting to access the plurality of second memory locations;
• if the second requester owns the mutex,
• allowing the second requester access to the plurality of second memory locations;
• if the second requester does not own the mutex,
• denying the second requester access to the plurality of second memory locations and returning the predetermined error code to the second requester, the error code indicating an invalid attempt to access the plurality of second memory locations, the predetermined error code causing the non-possessing requester to poll the mutex for availability after a predetermined period of time during which the non-possessing requester performs other processing tasks.

A system, comprising:

• system memory to store at least one of instructions and data;
• a processor coupled to said system memory, said processor including a first model specific register within a processor to store a mutex, possession of the mutex by ony one of a plurality of requesters to enable read/write access to a predetermined range of second memory locations stored within a second model specific register for a mutex possessing requester without suspending processing activity for all other cores and the plurality of requestors within the processor, wherein the first memory location is a model specific register within the processor;
• logic to allow mutex possession by a requester if the mutex is available;
• logic to deny mutex possession by a requester if the mutex is unavailable;
• logic to disable read/write access to the predetermined range of second memory locations for a nor-possessing requester, wherein the non-possessing requester is a requester not in possession of the mutex, by returning a predetermined error code to the non-possessing requester for attempts by the non-possessing requester to access the predetermined range of second memory locations, the predetermined error code causing the non-possessing requester to poll the mutex for availability after a predetermined period of time during which the nanpossessing requester performs other processing tasks;
• logic to release possession of the mutex by a mutex possessing requester upon completion of a processing task by the mutex possessing requester.