Instruction and logic for register based hardware memory renaming

A method comprising, within a processor:

• identifying a dependency between a store instruction and a load instruction, wherein the store instruction is to store data in a particular location of the memory subsystem, and the load instruction is to load data from the particular location of the memory subsystem;
• assigning a particular one of a plurality of dedicated memory renaming (MRN) registers to the store instruction as an additional destination for the store instruction and assign the MRN register to the load instruction as an additional source for the load instruction based on the identified dependency;
• copying, based on the assigned MRN register, information in a first logical register associated with the store instruction directly to a second logical register associated with the load instruction;
• executing the store instruction, using at least one execution unit of the processor, to store the data in each of the particular location of the memory subsystem and the particular MRN register;
• and
• execute the load instruction, using at least one execution unit of the processor, to load data from the particular MRN register instead of the particular location of the memory subsystem based on the information of the first logical register being copied to the second logical register;
• and
• writing information associated with the store instruction to an entry of a memory-rename check table upon deallocation of the store instruction from a store buffer of the memory subsystem, wherein the information includes store data for the store instruction.

A system, comprising:

• a processor device comprising:
• a core;
• a memory subsystem;
• a predictor module including circuitry to:
• identify a dependency between a store instruction to store data in a particular location of the memory subsystem and a load instruction to load data from the particular location of the memory subsystem, wherein the store instruction and the load instruction are for execution by the core;
• and
• assign a particular one of a plurality of dedicated memory renaming (MRN) registers to the store instruction as an additional destination for the store instruction and assign the MRN register to the load instruction as an additional source for the load instruction based on the identified dependency;
• and
• a memory rename module including circuitry to copy, based on the assigned MRN register, information in a first logical register associated with the store instruction directly to a second logical register associated with the load instruction,
• wherein the core comprises one or more execution units to execute the store operation to store the data in each of the particular location of the memory subsystem and the particular MRN register, and execute the load instruction to load data from the particular MRN register instead of the particular location of the memory subsystem, and
• wherein the memory subsystem includes circuitry to write information associated with the store instruction to an entry of a memory-rename check table upon deallocation of the store instruction from a store buffer of the memory subsystem.