Decimal and binary floating point rounding
AssigneeInternational Business Machines Corporation
InventorsSteven R. Carlough, Klaus M. Kroener, Petra Leber, Cedric Lichtenau, Silvia M. Mueller
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AssigneeInternational Business Machines Corporation
InventorsSteven R. Carlough, Klaus M. Kroener, Petra Leber, Cedric Lichtenau, Silvia M. Mueller
Estimating the term…
Arithmetic logic circuitry is provided for performing a floating point arithmetic add/subtract operation on first and second floating point numbers. The method includes: generating a guard digit for the first or second number by transforming the first and second numbers by a compressing function; determining a result depending on the arithmetic operation, a sum of the transformed floating point numbers, and first and second differences of the transformed floating point numbers, and determining a corresponding result plus one by additionally adding a value of one to the result; generating injection values for rounding the final result; generating injection carry values based on the transformed first and second numbers and the injection values; and selecting the final result from the result, the result plus one, and a least significant digit, based on the injection carry values and the end around carry signals.
A logic device comprising:
A computer implemented method for performing a floating point arithmetic add/subtract operation on a first floating point number and a second floating point number, wherein the first floating point number has a first magnitude and the second floating point number has a second magnitude, and wherein the first and second floating point numbers are in binary floating point format, the method comprising:
A computer program product comprising a non-transitory computer readable medium including a computer readable program, wherein the computer readable program when executed on a computer causes the computer to perform a method for performing a floating point arithmetic add/subtract operation on a first floating point number and a second floating point number, wherein the first floating point number has a first magnitude and the second floating point number has a second magnitude, and wherein the first and second floating point numbers are in binary floating point format, the method comprising:
Dependencies are inferred from the claim text.