High-resolution power electronics measurements

A system to determine an on-state impedance of a high voltage transistor during switching, the system comprising:

• a test circuit to receive the high voltage transistor;
• a drive circuit to provide a switching control signal to a gate control terminal of the high voltage transistor to alternately conduct and block current from a high voltage supply in the test circuit;
• a current sense circuit to provide a current sense signal representing a current flowing in the high voltage transistor;
• an attenuator circuit to generate an attenuator output signal representing a voltage across the high voltage transistor when the high voltage transistor is turned on, the attenuator circuit comprising:
• a clamp transistor having a first terminal coupled with a drain terminal of the high voltage transistor through a first resistor, a second terminal to provide a sense signal to a first internal node, and a control terminal,
• a bias circuit to provide a first bias signal to the control terminal based on a first supply voltage to turn the clamp transistor on when the high voltage transistor is turned on,
• a first voltage divider circuit, including an attenuator output node to provide the attenuator output signal based on the sense signal from the clamp transistor, a first divider resistor coupled between the first internal node and the attenuator output node, and a second divider resistor coupled between the attenuator output node and a constant voltage node, and
• a Zener diode coupled between the first internal node and the constant voltage node to limit a voltage between the first internal node and the constant voltage node when the high voltage transistor is turned off;
• a differential amplifier, including a first input coupled with the attenuator output node to receive the attenuator output signal, a second input coupled with a reference voltage node, and an output to provide an amplified sense voltage signal representing the voltage across the high voltage transistor when the high voltage transistor is turned on;
• and
• an analysis system, including at least one processor to compute an on-state impedance value based on a slope of the current sense signal and a slope of the amplified sense voltage signal.

A measurement circuit to measure a voltage of a drain terminal of a high voltage transistor during switching, the measurement circuit comprising:

• an attenuator circuit to generate an attenuator output signal representing a voltage across the high voltage transistor when the high voltage transistor is turned on, the attenuator circuit comprising:
• a clamp transistor having a first terminal coupled with the drain terminal of the high voltage transistor through a first resistor, a second terminal to provide a sense signal to a first internal node, and a control terminal,
• a bias circuit to provide a first bias signal to the control terminal based on a first supply voltage to turn the clamp transistor on when the high voltage transistor is turned on,
• a first voltage divider circuit, including an attenuator output node to provide the attenuator output signal based on the sense signal from the clamp transistor, a first divider resistor coupled between the first internal node and the attenuator output node, and a second divider resistor coupled between the attenuator output node and a constant voltage node, and
• a first clamp circuit to limit a voltage between the first internal node and the constant voltage node when the high voltage transistor is turned off;
• a differential amplifier, including a first input coupled with the attenuator output node to receive the attenuator output signal, a second input coupled with a reference voltage node, and an output to provide an amplified sense voltage signal representing the voltage across the high voltage transistor when the high voltage transistor is turned on;
• and
• a second clamp circuit, including:
• a second voltage divider circuit, including a third divider resistor coupled between a second supply voltage and a second internal node, and a fourth divider resistor coupled between the second internal node and the constant voltage node, and
• a diode to limit a voltage of the attenuator output node, the diode including an anode coupled with the attenuator output node, and a cathode coupled with the second internal node.

A method of determining an on-state impedance of a high voltage transistor, comprising:

• using a first clamping circuit, which limits voltage applied to an attenuation circuit, and measuring a drain voltage of the high voltage transistor while the high voltage transistor is turned on;
• clamping a voltage coupled to the attenuation circuit and to an input of an amplifier and limiting voltage applied to the input of the amplifier;
• measuring a transistor current flowing through the high voltage transistor while the high voltage transistor is turned on, wherein the measuring of the drain voltage and the transistor current are performed without direct connection of an oscilloscope to a device under test;
• digitizing a plurality of samples of the measured drain voltage of the high voltage transistor;
• digitizing a plurality of samples of the measured transistor current;
• using at least one processor, determining a first slope corresponding to the plurality of samples of the measured drain voltage;
• using the at least one processor, determining a second slope corresponding to the plurality of samples of the measured transistor current;
• and
• using the at least one processor, computing an on-state impedance value at least partially according to the first and second slopes.