Method and device for self-biased and self-regulated common-mode amplification
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsMichel Ayraud, Sandrine Nicolas
Life of this patent
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Abstract
An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.
Claims19
A method of common-mode biasing of an output terminal of an amplification stage that comprises a Iran conductance amplification transistor, the method comprising:
- biasing the output terminal to a bias potential that is based on a gate-source voltage present between a gate and a source of the amplification transistor and on a compensation of parasitic variations of the gate-source voltage, wherein the compensation is based on a compensation current flowing in a resistor connected between the gate of the amplification transistor and the output terminal, the compensation current generating a compensation voltage across terminals of the resistor.
An amplification device comprising:
- an amplification stage having a transconductance amplification transistor and an output terminal;
- and a biasing circuit configured to bias, in common mode, the output terminal to a bias potential based on a gate-source voltage present between a gate and a source of the amplification transistor, the gate-source voltage being compensated for parasitic variations, wherein the biasing circuit is configured to pass a compensation current through a first resistor connected between the gate of the amplification transistor and the output terminal, a voltage generated across terminals of the first resistor being intended to compensate the parasitic variations.
A radio frequency communication system comprising a reception stage that includes an antenna input, the reception stage comprising an amplification device configured to amplify a reception signal, and a signal processor configured to process the amplified reception signal, wherein the amplification device comprises an amplification stage having a transconductance amplification transistor and an output terminal, and a biasing circuit configured to bias, in common mode, the output terminal to a bias potential based on a gate-source voltage present between a gate and a source of the amplification transistor, the gate-source voltage being compensated for parasitic variations, wherein the biasing circuit is configured to pass a compensation current through a first resistor connected between the gate of the amplification transistor and the output terminal, the voltage generated across terminals of the first resistor being intended to compensate the parasitic variations.
An amplification device comprising:
- a reference voltage terminal;
- an output terminal;
- a transconductance amplification transistor having a current path between the reference voltage terminal and the output terminal;
- a resistor coupled between a gate of the amplification transistor and the output terminal;
- and a compensation transistor having a current path coupled between the reference voltage terminal and a node that is connected to both the gate of the amplification transistor and a terminal of the resistor.
Dependencies are inferred from the claim text.