High output power digital-to-analog converter system

A high output power digital to analog converter (DAC) system, the DAC comprising:

• M parallel DAC cores, wherein each parallel DAC core comprises an array of current sources and a switch bank for converting most significant bits and least significant bits of a respective digital input word to a respective analog output in parallel with each other;
• M parallel cascodes forming a cascode stage, wherein the M parallel cascodes are directly connected to corresponding analog outputs of M parallel DAC core via a network of traces;
• a power combining network to combine output power at outputs of the M parallel cascodes to provide an aggregate analog output;
• and
• a digital signal processor to provide digital input words having bits arranged in a random manner as the respective digital input word of the M parallel DAC cores;
• wherein M is equal to or greater than two.

A high output power digital to analog converter (DAC) system, the DAC comprising:

• M parallel DAC cores, wherein each parallel DAC core comprises an array of current sources and a switch bank for converting most significant bits and least significant bits of a respective digital input word to a respective analog output in parallel with each other;
• M parallel cascodes forming a cascode stage, wherein the M parallel cascodes are directly connected to corresponding analog outputs of M parallel DAC core via a network of traces;
• and
• a power combining network to combine output power at outputs of the M parallel cascodes to provide an aggregate analog output;
• wherein:
• M is equal to or greater than two;
• the DAC system is part of a transmitter system, and the transmitter system further includes a digital pre-distortion processor for (1) providing an inverse of non-linearity as input to a DAC stage having the M parallel DAC cores and a cascode stage having the M parallel cascodes to compensate non-ideal errors of the DAC stage and/or the cascode stage, and/or (2) restore ideal waveforms to compensate the non-ideal errors present in the DAC stage and the cascode stage;
• and
• the digital pre-distortion processor is an open loop pre-distortion processor, and compensates the non-ideal errors of both the DAC stage and the cascode stage using only a single set of coefficients under various conditions indexed by a sample of a digital input signal to the DAC system.

A transmitter system for transmitting a radio frequency (RF) output, the transmitter system comprising:

• M parallel DAC cores, wherein M is equal to or greater than 2, and each parallel DAC core comprises an array of current sources and a switch bank for converting most significant bits and least significant bits of a respective digital input word to a respective analog output in parallel with each other;
• and
• a cascode stage directly connected to the outputs of the M parallel DAC cores for combining analog output signals of the M parallel DAC cores to provide an aggregate analog output as the RF output;
• and
• wherein at least a majority of amplification or gain of the transmitter system is provided by the M parallel DAC cores and the cascode stage, and each one of the M parallel DAC cores converts the same digital input word to the respective analog output in parallel with each other.

A transmitter system for transmitting a radio frequency (RF) output, the transmitter system comprising:

• M parallel DAC cores, wherein M is equal to or greater than 2, and each parallel DAC core comprises an array of current sources and a switch bank for converting most significant bits and least significant bits of a respective digital input word to a respective analog output in parallel with each other;
• and
• a cascode stage directly connected to the outputs of the M parallel DAC cores for combining analog output signals of the M parallel DAC cores to provide an aggregate analog output as the RF output;
• and
• wherein at least a majority of amplification or gain of the transmitter system is provided by the M parallel DAC cores and the cascode stage, and coarse gain setting and/or fine gain adjustment is controllable through a programmable reference current of the M parallel DAC cores which directly affects a total output current of the aggregate analog output.

A high output power digital to analog converter (DAC) system, the DAC comprising:

• two or more parallel DAC cores, wherein each parallel DAC core comprises a plurality of bit cells for converting most significant bits and least significant bits of a same digital input word to a respective analog output in parallel with each other;
• two or more parallel cascodes forming a cascode stage, wherein the two or more parallel cascodes are directly connected to corresponding analog outputs of two or more parallel DAC core via a network of traces;
• and
• a power combining network to combine output power at outputs of the two or more parallel cascodes to provide an aggregate analog output.