Data transfer between clock domains
AssigneeNordic Semiconductor ASA
InventorsPer Carsten Skoglund, Asghar Havashki, Arne Wanvik Venas, Asmund Holen, Markus Bakka Hjerto
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Abstract
An arrangement for transferring a data signal (data_a) from a first clock domain (2) to a second clock domain (4) in a digital system. The arrangement has a signal input (6, 7) for receiving an input signal (data_a) from the first clock domain (2), means (6, 7) for storing the input signal (data_a), and means (12, 13) for transferring the input signal (data_a) to the second clock domain (4) following a transition in the clock signal (ck) of the second clock domain (4).
Claims16
An arrangement for transferring a data signal from a first clock domain to a second clock domain in a digital system, the arrangement comprising:
- a flip-flop for receiving an input signal directly from the first clock domain, wherein the input signal is fed to a “set” (S) input of the flip-flop and a “data” (D) input of the flip-flop is connected to ground;
- a storing circuit portion for storing the input signal;
- and
- a transferring circuit portion for transferring the input signal to the second clock domain following a transition in the clock signal of the second clock domain.
A method of transferring a data signal from a first clock domain to a second clock domain in a digital system, the method comprising:
- receiving an input signal directly from the first clock domain;
- feeding the input signal to a “set” (S) input of a flip-flop, wherein a “data” (D) input of the flip-flop is connected to ground;
- storing the input signal;
- transferring the input signal to the second clock domain following a transition in the clock signal of the second clock domain.
Dependencies are inferred from the claim text.