Methods and devices for data demodulation
AssigneeLattice Semiconductor Corporation
InventorsQiming Wu, Bing Zhang, Fei Song
Life of this patent
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Abstract
Embodiments of the present disclosure relate to methods and device for receiving PAM data stream. In an embodiment, a method comprises receiving a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns; determining boundary voltages for the plurality of bit patterns; and calibrating, based on the boundary voltages, a threshold voltage for use in recognition of the plurality of bit patterns. In this way, bit patterns may be accurately recognized based on the calibrated threshold voltage.
Claims17
A method comprising:
- receiving a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns;
- determining boundary voltages for the plurality of bit patterns, each of the boundary voltages being associated with one of the plurality of bit patterns, wherein determining the boundary voltages comprises, for a target bit pattern of the plurality of bit patterns:
- determining a first count associated with the target bit pattern in a first plurality of clock cycles based on a reference threshold voltage;
- varying the reference threshold voltage based on the target bit pattern;
- and
- determining a second count associated with the target bit pattern in the first plurality of clock cycles based on the varied reference threshold voltage, wherein the boundary voltage for the target bit pattern is based on the first and second counts;
- and
- calibrating, based on the boundary voltages, a threshold voltage for use in recognition of the plurality of bit patterns.
A device comprising:
- at least one sampler operable to receive a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns, wherein the at least one sampler comprises:
- an adder operable to subtract a first threshold voltage from voltages of the signal stream;
- and
- a slicer connected to the adder and operable to convert output of the adder into a sampled signal stream associated with the plurality of bit patterns;
- and
- a calibration circuit coupled to the at least one sampler and operable to:
- determine boundary voltages for the plurality of bit patterns;
- and
- calibrate, based on the boundary voltages, a second threshold voltage for use in recognition of the plurality of bit patterns.
A device comprising:
- at least one sampler operable to:
- receive a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns;
- and
- compare an initial threshold voltage with voltages of the received signal stream in a first plurality of clock cycles;
- and
- a calibration circuit coupled to the at least one sampler and operable to:
- determine, with the at least one sampler, a peak voltage by:
- in response to the voltages of the signal stream exceeding the initial threshold voltage in at least one of the first plurality of clock cycles, increasing the initial threshold voltage to obtain an increased threshold voltage;
- and
- in response to the voltages of the signal stream being below the increased threshold voltage in the first plurality of clock cycles, determining the increased threshold voltage to be the peak voltage;
- determine boundary voltages for the plurality of bit patterns based on the peak voltage;
- and
- calibrate, based on the boundary voltages, a threshold voltage for use in recognition of the plurality of bit patterns.
Dependencies are inferred from the claim text.