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US 10,038,418 B1Granted
Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass
AssigneepSemi Corporation
InventorsEmre Ayranci, Miles Sanner
Life of this patent
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Abstract
An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
Claims9
A Low Noise Amplifier (LNA) comprising:
- (a) a first path including a first input field effect transistor (FET) coupled in series with a first output FET, a gate of the first output FET being coupled to a bias voltage source;
- (b) a second path including a second input FET coupled in series with a second output FET, a gate of the first input FET coupled to a gate of the second input FET and a gate of the second output FET selectively coupled to a gate of the first output FET;
- and
- (c) a first inductive element coupled between the first input FET and ground;
- (d) a second inductive element coupled between the second input FET and ground;
- and
- (e) a source switch coupled between the source of the first and second input FETs such that when the source switch is closed, the source of the first input FET is coupled to the source of the second input FET and when the source switch is open, the source of the first input FET is disconnected from the source of the second input FET.
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A method for amplifying signals having a wide dynamic range, including:
- (a) selecting a gain mode;
- (b) setting at least one bias voltage based on the selected gain mode and applying the at least one bias voltage to corresponding gates of output FETs of an LNA to achieve the selected gain mode, the LNA having a plurality of paths, each path having an input FET and an output FET, each input FET being coupled in series with a corresponding output FET within the same path;
- (c) coupling a capacitance between the gate and source of an input FET that is conducting when at least one other input FET is not conducting;
- and
- (d) selecting a value of the capacitance to be coupled between the gate and source, such that the input impedance of the LNA will be the same as when the input FET that is not conducting was conducting.
2 more elements
Dependencies are inferred from the claim text.