Check pointing a shift register using a circular buffer

A hardware structure configured to derive one or more check points for a main shift register having a predetermined number of data positions and being restorable to a plurality of points in time, the check points being triggered by trigger events, the hardware structure comprising:

• a circular buffer having a plurality of data positions for storing data elements, the plurality of data positions including a data position for each data position of the main shift register, an additional data position for each check point, and an additional data position for each of the plurality of points in time;
• a pointer configured to identify a plurality of active data positions from the plurality of data positions of the circular buffer, the active data positions including a first subset of the plurality of data positions of the circular buffer that represent the main shift register and an additional data position for each check point;
• an update history shift register having a data position for each check point, the data positions of the update history shift register storing information indicating whether the circular buffer was updated in a same clock cycle as a particular check point trigger event;
• and
• check point generation logic configured to derive each check point by selecting a subset of the plurality of active data positions based on the information stored in the update history shift register.