Gate-all-around nanosheet field-effect transistors and methods of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsMark S. Rodder, Joon Goo Hong
Life of this patent
Estimating the term…
Abstract
A method of manufacturing a gate-all-around (GAA) nanosheet (NS) field effect transistor (FET) includes forming a stack on a substrate. The stack includes an alternating arrangement of conducting channel layers and non-uniform sacrificial regions. Each of the non-uniform sacrificial regions includes upper, middle, and lower sacrificial layers. The upper and lower sacrificial layers are configured to etch at a first etch rate and the middle sacrificial layer is configured to etch at a second etch rate greater than the first etch rate.
Claims9
A gate-all-around (GAA) nanosheet (NS) field effect transistor (FET) comprising:
- a source electrode;
- a drain electrode;
- a plurality of channel regions extending between the source electrode and the drain electrode;
- a gate stack between the source electrode and the drain electrode and between two adjacent channel regions of the plurality of channel regions;
- and
- a pair of reverse inner spacers between the two adjacent channel regions,
- wherein the source electrode and the drain electrode each comprise a first portion and a second portion, the first portion comprising a vertical sidewall portion and a lateral extension portion extending from the vertical sidewall portion between the two adjacent channel regions,
- wherein each reverse inner spacer of the pair of reverse inner spacers comprises a first inner spacer segment and a second inner spacer segment vertically spaced apart from the first inner spacer segment by one of the lateral extension portions of the source electrode or the drain electrode, and
- wherein the first and second inner spacer segments of each reverse inner spacer are adjacent to the vertical sidewall of one of the first portions of the source and drain electrodes.
Dependencies are inferred from the claim text.