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US 10,007,628 B2Granted
Dynamically adjustable multi-line bus shared by multi-protocol devices
AssigneeQUALCOMM Incorporated
InventorsRadu Pitigoi-Aron, Richard Dominic Wietfeldt
Life of this patent
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Abstract
A device is provided that has a bus including a first line and a second line. A first set of devices are coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal. One or more additional lines are connected between two or more of the devices in the first set of devices for transmitting signaling between the two or more devices. A second set of devices are configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation, where in the second mode of operation symbols are encoded across the first line, the second line, and the at least one of the additional lines.
Claims33
An apparatus, comprising:
- a bus including a first line and a second line;
- a first set of devices coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal;
- one or more additional lines connecting two or more devices in the first set of devices for transmitting signaling between the two or more devices;
- and
- a second set of devices, within the first set of devices, further configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation,
- wherein in the second mode of operation, symbols are encoded across the first line, the second line, and the at least one of the additional lines,
- wherein in the second mode of operation, data are encoded in symbols that control signaling state of the first line, the second line, and the at least one of the additional lines such that clock information is embedded in signaling state transitions of one or more of the first line, the second line, and the at least one of the additional line between consecutively-transmitted symbols.
4 more elements
A method, comprising:
- operating a first set of devices according to a first mode of operation configured to use a first line of a bus for data transmissions and use a second line of the bus for a first clock signal;
- determining availability of one or more additional lines connecting two or more devices in the first set of devices for transmitting signaling between the two or more devices;
- and
- operating a second set of devices, within the first set of devices, according to a second mode of operation configured to use the bus and at least one of the additional lines for data transmissions, wherein in the second mode of operation, data are encoded in symbols that control signaling state of the first line, the second line, and the at least one of the additional lines such that clock information is embedded in signaling state transitions of one or more of the first line, the second line, and the at least one of the additional line between consecutively-transmitted symbols.
1 more element
A method performed by a first device coupled to a two-wire serial bus, comprising:
- establishing a connection on the two-wire serial bus with a second device coupled to the two-wire serial bus using a predefined base protocol associated with the two-wire serial bus;
- determining availability of one or more additional lines that are configurable for data communications between the first device and the second device;
- encoding data, according to a high data rate protocol, in sequences of symbols for transmission over a combination of lines that includes the two-wire bus and the one or more additional lines, wherein each symbol in the sequences of symbols controls signaling state of each line of the combination of lines, wherein clock information is encoded in transitions between pairs of consecutively-transmitted symbols in the sequences of symbols;
- and
- transmitting the sequences of symbols over the combination of lines.
2 more elements
An apparatus, comprising:
- a two-wire serial bus;
- a first device that includes a communication interface adapted to couple the first device to the two-wire serial bus and configured to communicate using a predefined base protocol associated with the two-wire serial bus;
- a second device coupled to the two-wire serial bus and configured to communicate using the predefined base protocol;
- and
- a processing circuit coupled to the communication interface, the processing circuit configured to:
- determine availability of one or more additional lines that are configurable for data communications between the first device and the second device;
- encode data, according to a high data rate protocol, in sequences of symbols for transmission over a combination of lines that includes the two-wire bus and the one or more additional lines, wherein each symbol in the sequences of symbols controls signaling state of each line of the combination of lines, wherein clock information is encoded in transitions between pairs of consecutively-transmitted symbols in the sequences of symbols;
- and
- transmit the sequences of symbols over the combination of lines.
6 more elements
Dependencies are inferred from the claim text.